Integrated Circuits & Electronics Design and Analysis Laboratory
Department of Electrical & Computer Engineering, Drexel University

Prof. Ioannis Savidis Awarded 2018 NSF CAREER Award

Prof. Ioannis Savidis Awarded 2018 NSF CAREER Award

Parameter Obfuscation — a novel methodology for the protection of analog intellectual property.

Prof. Ioannis Savidis Wins IEEE Philadelphia Section Award

Prof. Ioannis Savidis Wins IEEE Philadelphia Section Award

For contributions in hardware security and trust — obfuscation of digital and analog circuits.

Prof. Ioannis Savidis

Prof. Ioannis Savidis

Associate Professor

The Integrated Circuits and Electronics (ICE) Design and Analysis Laboratory advances state of the art high performance and mobile computing platforms through research on circuit techniques and methodologies that target:

  1. minimizing power consumption in digital and mixed signal circuits,
  2. providing work-load aware on-chip power management,
  3. power and clocking for heterogeneous 3-D systems, and
  4. securing integrated circuits from hardware Trojans and IP theft.

The ICE lab is located in the Bossone Research Enterprise Building on Drexel’s Main Campus in Philadelphia.

Research Focus

Our work spans 3-D integrated circuits, hardware security and trust, and sub/near-threshold circuits with current-mode logic. Explore our research themes and active projects.

Join Us

We welcome motivated PhD students, MS students, and undergraduate researchers interested in VLSI design, hardware security, and energy-efficient computing. Contact us to learn more.

news

May 22, 2026 We are recruiting PhD students interested in 3-D ICs, hardware security, and energy-efficient circuit design. See our contact page for details.
Nov 18, 2025 ICCD 2025 Tutorial on Machine Learning for Automated Physical Design
May 24, 2025 ISCAS 2025 Tutorial on ML-AI Techniques for Analog EDA
Mar 15, 2024 Vaibhav Venugopal Rao Completes Ph.D. on Analog Circuit Security
Nov 01, 2023 TVLSI Paper on Hidden Costs of Analog Deobfuscation Attacks
May 28, 2019 Two Papers Presented at ISCAS 2019
Jun 18, 2018 Prof. Ioannis Savidis Awarded 2018 NSF CAREER Award
May 29, 2018 The Joseph and Shirley Carleone Endowed Fellowship is awarded to Divy Pathak for the academic year 2017-2018.

view all news →

selected publications

  1. Machine Learning for Automated Physical Design
    I. Savidis and P. Shrestha
    In 2025 IEEE International Conference on Computer Design, 2025
    Tutorial
    PDF
  2. Emerging ML-AI Techniques for Analog EDA
    I. Savidis
    In 2025 IEEE International Symposium on Circuits and Systems, 2025
    Tutorial
    PDF
  3. Machine Learning for Digital Design Automation
    I. Savidis and P. Shrestha
    In 2024 IEEE International Symposium on Circuits and Systems, 2024
    Tutorial
    PDF
  4. Enhancing Analog Circuit Security Through Obfuscation
    Vaibhav Venugopal Rao
    Drexel University, 2024
    PDF
  6. VLSI
    Synthesis of Analog and Mixed-Signal Circuits on a Programmable Array
    Z. Chen and I. Savidis
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025
    PDF
    2 Google Scholar citations
  7. VLSI
    Hidden Costs of Analog Deobfuscation Attacks
    V. V. Rao, K. Juretus, and I. Savidis
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023
    PDF
    9 Google Scholar citations
  8. Securing Wireless Communication via Hardware-based Packet Obfuscation
    J. Chacko, K. Juretus, M. Jacovic, and 4 more authors
    Journal of Hardware and Systems Security, 2019
    PDF
    4 Google Scholar citations
  9. Heterogeneous 3-D Circuits: Integrating Free-Space Optics with CMOS
    I. Savidis, B. Ciftcioglu, J. Xu, and 10 more authors
    Microelectronics Journal, 2016
    PDF
    10 Google Scholar citations
  10. VLSI
    Experimental Analysis of Thermal Coupling in 3-D Integrated Circuits
    I. Savidis, B. Vaisband, and E. G. Friedman
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015
    PDF
    26 Google Scholar citations
  11. ISQED
    Analysis of the Security Vulnerabilities of 2.5-D and 3-D Integrated Circuits
    V. V. Rao, A. Sasan, and I. Savidis
    In Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED), 2022
    PDF
    12 Google Scholar citations
  12. ISCAS
    Mesh Based Obfuscation of Analog Circuit Properties
    V. V. Rao and I. Savidis
    In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), 2019
    PDF
    33 Google Scholar citations
  13. Transistor Sizing for Parameter Obfuscation of Analog Circuits Using Satisfiability Modulo Theory
    V. V. Rao and I. Savidis
    In Proceedings of the IEEE International Asia Pacific Conference on Circuits and Systems (APCCAS), 2018
    PDF
    7 Google Scholar citations
  14. Clock Tree Synthesis for Heterogeneous 3-D Integrated Circuits
    I. Daulagala and I. Savidis
    In Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP), 2017
    PDF
    1 Google Scholar citations
  15. Protecting Analog Circuits with Parameter Biasing Obfuscation
    V. V. Rao and I. Savidis
    In Proceedings of the IEEE Latin American Test Symposium (LATS), 2017
    PDF
    55 Google Scholar citations
  16. Physical Gate Based Preamble Obfuscation for Securing Wireless Communication
    J. Chacko, K. Juretus, M. Jacovic, and 4 more authors
    In Proceedings of the International Conference on Computing, 2017
    PDF
    13 Google Scholar citations
  17. A Framework for Exploring Alternative Fault-Tolerant Schemes Targeting 3-D Reconfigurable Architectures
    K. Siozios, I. Savidis, and D. Soudris
    In Proceedings of the IEEE International Conference on Embedded Computer Systems: Architectures, 2016
    PDF
    5 Google Scholar citations