Sub/Near-Threshold Circuits with Current-Mode Logic

Since power and energy have not scaled similarly to the dimension of the transistor, it has become difficult to operate all transistors simultaneously for a given power budget and time (concept of dark silicon). In addition, the energy and power efficiency of mobile devices is critical to extend usage. One potential solution is to operate circuits in the sub-threshold or near-threshold regime. A reduction in supply voltage reduces dynamic power quadratically and static power exponentially.

However, in the sub-threshold regime, performance degradation, reliability issues, and high leakage power severely affect the overall energy and power improvements. Near-threshold devices are more tolerant to performance degradation and are more reliable, and near-threshold circuits (NTC) are not as energy inefficient as sub-threshold circuits. Current-mode logic (CML) circuits are well known for higher operating speed compared to conventional CMOS, while dynamic current-mode logic (DCML) offers reduced static leakage with competitive delay. Our group explores NTC combined with DCML to trade off power and performance for energy-efficient computing.